Yilei,
I think you need to be a bit more detailed in your requirements. It sounds
like you need a standard silicon wafer, thermally oxidized, coated with
LPCVD polysilicon, and then dipped in KOH with a one-sided wafer chuck.
What range of thicknesses of each layer can you work with? Does the
silicon ayer need to be in a certain orientation (<100>? <110>? <111>?)?
Does that silicon layer need to be single-crystal? What kind of oxide do
you need? Are pinholes a problem? A little more description would go a lot
longer in this forum.

Jesse Fowler
  UCLA/MAE Dept., 420 Westwood Plaza, Room 37-129, ENGR IV
  Los Angeles, CA 90095-1597 | (310)825-3977
"Observations of nature, no matter how seemingly arcane, are like
peeling off one more layer from the great onion of knowledge"
    -- Don Petit, ISS science officer

On Wed, 23 Apr 2003, Yilei wrote:

> Hi Member:
> I need some wafers with following structure to do my research project, from
> bottom to top: silicon dioxide, silicon, silicon dioxide, polysilicon. We only
> have special requirements to the polysilicon layer, for example, grain size,
> crystalline, etc.
>
> Can anyone help me where I can find them? If possible, the cost and the
choices
> we have for the polysilicon layer. Now we only need a small batch and maybe a
> little more later.
>
> Thanks and regards,
> Yilei
>
>
>
>
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