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MEMSnet Home: MEMS-Talk: Anisotropic c-Si RIE
Anisotropic c-Si RIE
2003-10-28
Jobert van Eisden
2003-10-28
Eric Miller
2003-10-28
Neal Ricks
2003-11-01
ShuTing Hsu
2003-10-28
Michael D Martin
2003-10-28
Phillipe Tabada
Anisotropic c-Si RIE
Eric Miller
2003-10-28
Jobert,

You should consider running a Cyro process if you need to maintain smooth
sidewalls.  Here is a link to a paper describing the process:

http://www.oxford-instruments.com/pdf/spie2.pdf

Eric Miller
Washington Tech Center

----- Original Message -----
From: "Jobert van Eisden" 
To: 
Sent: Monday, October 27, 2003 4:05 PM
Subject: [mems-talk] Anisotropic c-Si RIE


> Dear all,
>
> We are trying to etch vias (3-10 um) to a depth of 5 um with sidewall
> roughness under 30 nm. The mask we use is 1 um thermal oxide. I would
> like to ask you all if there is any way the Bosch process can be
> adapted, or if there is a gas chemistry we can use to do a RIE process
> that gives us these smooth sidewalls. There should be little or no mask
> undercut.
>
> We have tried running a Bosch like recipe using very little ICP power
> and short cycles, which gave us too much sidewall roughness.
> The available chemistries are CHF3, CF4, O2 and N2 on the dieletrics
> chamber and SF6, C4F8, O2 and Ar on the Bosch chamber.
>
> I would very much appreciate ideas and suggestions.
>
> Regards,
>
> Jobert van Eisden
> Graduate student
> SUNY Albany
>
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