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MEMSnet Home: MEMS-Talk: Reg: problems with SU-8 bonding to the silicon wafer
Reg: problems with SU-8 bonding to the silicon wafer
2005-06-23
Vishwanath Somashekar
2005-06-23
[email protected]
2005-06-23
Vishwanath Somashekar
Thin PDMS Films
2005-06-24
[email protected]
2005-06-25
Tolga Kaya
2005-06-27
Patrick Roman
2005-06-23
Brubaker Chad
2005-06-24
Brubaker Chad
2005-06-27
Vishwanath Somashekar
2005-06-29
Brubaker Chad
2005-06-30
Vishwanath Somashekar
Reg: problems with SU-8 bonding to the silicon wafer
Brubaker Chad
2005-06-24
The best suggestion I can make for the alignment is to do a simple
masking step on the bare wafer, to put basic alignment keys (you could
possibly even use the first level mask of the SU-8).  Then, do a shallow
etch to define the patterns. You will then have alignment keys for the
second layer.

Best Regards,
Chad Brubaker


-----Original Message-----
From: [email protected]
[mailto:[email protected]] On Behalf Of Vishwanath
Somashekar
Sent: Thursday, June 23, 2005 4:51 PM
Cc: General MEMS discussion
Subject: Re: [mems-talk] Reg: problems with SU-8 bonding to the silicon
wafer

Hi,
Thanks for the response. I have tried to spin the second layer of SU-8
before doing the PEB and devoloping of the first layer. However, I
seem to land into a problem of aligning the second layer. I can barely
see the the alignment markers which are placed in the first layer for
me to help align the second layer. Any suggestions regarding this
would help a lot.
reply
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