Badin,
The magnitude of the electrostatic forces developed during bonding and
the stiffness of the structures to be bonded are the factors that
determine whether silicon and glass will bond or not.
When it comes to the stiffness, the thickness of the silicon wafer is
definitely an important factor.
For a certain thickness of your silicon, it is the lateral size and the
depth of your cavities that determine whether a certain applied voltage
will or will not produce the bonding.
For given cavity dimensions, reducing the applied voltage is the
solution to avoid bonding. Whether that lower voltage will still give a
reliable bonding outside the cavities is something that you need to
investigate.
You can find details for example in:
"Non destructive anodic Bonding test", J.A. Plaza e.a., J. Electrochem.
Soc., Vol. 144, No. 5, May 1997, pp. L108-L110.
There is one important difference between the test structures presented
in that article and yours, which makes it more difficult to evaluate
from those graphs the parameters that you would need to avoid bonding:
those cavities are etched in silicon, while the glass wafer is not
processed. This leaves the glass surface very smooth, while in your case
it most probably is not anymore after etching. And that's why you can
avoid bonding of those cavities when using the standard silicon wafers.
Your cavities are pretty large and shallow and the applied voltage is
high, so you would surely bond them if they were etched in silicon.
Regards,
Adriana Lapadatu
-----Original Message-----
From: Badin Damrongsak
Subject: [mems-talk] Pyrex wafer anodically bonded to Thin
Silicon:Problem
I found a problem during an anodic bonding between thin silicon and
pyrex wafers using EVG520/620.
On pyrex wafer, it was etched about 2-3um depth to create the cavity
which is around 4mm in diameter. The pyrex was then bonded to a 200um
thin silicon wafer on which has no pattern.
The problem I have found is that the silicon area over the 3um gap
cavity was somehow bonded to the pyrex wafer. I have no clue where the
problem is; probably too high voltage, too high force, etc. Have you
guys got any ideas how to solve this issue? Please feel free to contact
me.
The recipe of anodic bonding is as follows:
Temp = 380 degC
Force = 800 N (probably too high, for thin silicon wafers)
V = -1kV (probably too high)
Time = 4 min
The above recipe works well for anodic bonding between std thickness
silicon wafer and pyrex.