Dhananjay

here are some differences for our protocol.  We coat at about 150um
thickness on 3" wafers.

-We do piranha, then an HF dip (BOE actually) for 5min to remove SiO2
layer.  (If you do that, be super careful with HF.)

1. Bake at 200C for 10min.
...
...
...
6. We do 65C then 95C without ramping, but we ramp down from 95C to RT
at 70C/hr.

Sonicating sounds like a nice way to remove resist, but my guess is,
without it, you would still have the delamination.

Eric Johnston
Department of Bioengineering
University of Pennsylvania

Dhananjay Dendukuri wrote:
> Dear all,
>
> I have a severe problem of SU8 delamination. Please go through my process
> below and advise
>
> I am fabricating an array of 100 microchannels of 50 micron width and 40
> micron depth (the gap between two channels is 100 micron) on a 4 inch
> silicon wafer using *Su8 2035* negative resist. The process flow is given
> below.
>
> 1. Hard bake - 150 C for 20 min (after cleaning silicon wafer in Piranha
> solution).
> 2. Spin coat - 15 sec at 400 rpm followed by 30 sec at 2000 rpm.
> 3. Soft bake - 3 min at 65 C and 5 min at 95 C. (wait for 10 min)
> 4. UV expose - 28 sec to get an exposure energy of 220 mJ/cm2.
> 5. PEB - 30 min at lower initial temperature of 65 C and ramping up the
> temperature to 95 C in every 15 min with every 10 C increase. (Wait for 10
> min)
> 6. Development - In ultrasonic bath (without sonicator SU8 in the channel
> path is not possible to remove completely).
>
> Within 1 min of development, all the channels are completely delaminated. We
> tried the process on many wafers by changing different soft bake and PEB
> timings, but nothing is working.  Any suggestions to avoid delamination
> problem are deeply appreciated.
>
> Thank you
>
> Dhananjay