I assume he's not using plasma; that's the nice thing about XeF2 - you can
sublimate it into the etch chamber at room temperature and you get a very gentle
and selective Si etch.

The feature size sensitivity is probably just due to adsorption and gas
diffusion? For every Si atom you want to etch you need to adsorp two XeF2
molecules on the surface, have them dissociate/react with the Si and get rid of
the volatiles (2 Xe and one SiF4) - it seems this is adsorption and/or diffusion
limited and the more exposed surface area the faster the process will happen per
etch cycle/given amount of XeF2.

Dirk De Bruyker

-----Original Message-----
From: [email protected] [mailto:[email protected]] On
Behalf Of Edward Sebesta
Sent: Saturday, February 21, 2009 7:51 PM
To: 'General MEMS discussion'
Subject: [mems-talk] This is known as RIE Lag RE: XeF2 etching of Si

The problem you are describing is known as RIE Lag. It isn't unique to
XeF2 etch nor is it due to the gas inlet holes.

There is an excellent paper which covers this issue and an overview of
more advanced plasma etching at IBM.

http://www.research.ibm.com/journal/rd/431/armacost.html

Search for the term RIE lag. Or aspect ratio. It is a long paper.

You don't mention whether you are using a diode/triode plasma or an
inductively coupled plasma (High density plasma etching).

Edward H. Sebesta
Independent Semiconductor/MEMS Engineer