Dear Daniel,

you can try sth with LIGA technique, but it is quite expensive,
If the stack should consist of at least 3 stacked capacitors, I think I
would like try to arrange it within SOi wafer plus additional bonding with
Si wafer.

There is also so called MUMPs processes based on polysilicon (MEMSCAP
company)

I have never met yet such type of stacked capacitors.
 But about 3D structure try to find in such articles like:

 A.A. Yassen, S.W. Smith, M. Mehregany, F.L. Merat, “High-aspect rotary
polygon micromotor scanners”,
Sensors and Actuators A czy B 77:73-79, 1999

 A.A. Yassen, J.N. Mitchell, D.A. Smith, M. Mehregany, “Diffraction grating
scanners using polysilicon
micromotors”, In Proc. IEEE: 1999, pp.

L. Fan, M.C. Wu, “Self-Assembled Micro-XYZ Stage with Micro-Ball Lens for
Optical Scanning and
Alignment”, In Proc: International Conference on Optical MEMS and Their
Applications, MOEMS' 97, 18-21 Nov.
1997, Japan , pp.

L.Y. Lin, E.L Goldstein, R.W. Tkach, “Free-Space Micromachined Optical
Switches for Optical Networkingal
Bench”, IEEE Journal of Selected Topics in Quantum Electronics 5 (1):4-9,
1999

Good luck!

 Karolina



Hi guys,

I am wondering which micromechanical processes exist to obtain high-storage
multistack capacitors. I imagine you may realize it or by employing multiple
lithographic steps for each metal plate / dielectrics, or, by patterning,
transferring and bonding of a lot of single plates into
multi-stacks.


I could not find any methods, reports, papers around describing the actual
methods of small footprint capacitors. Any help and references are highly
welcome.

Bye

Daniel