Gold

Marco
________________________________________________________________
Marc Reinig                           Phone: (831) 459-4362
Laboratory for Adaptive Optics        Fax:   (831) 459-2298
UCO/Lick                              Email: [email protected]
University of California, Santa Cruz
1156 High Street
Santa Cruz, CA 95064

> -----Original Message-----
> From: [email protected] [mailto:mems-
> [email protected]] On Behalf Of Yu Chen
> Sent: Thursday, May 13, 2010 5:28 PM
> To: General MEMS discussion
> Subject: Re: [mems-talk] what CMOS compatible means exactly
>
> for a standard CMOS cleanroom.
> that materials are allowed and not allowed?
>
> I know that CMOS cleanroom usually do not use liftoff process.
> Is there any other process are not prefered in CMOS cleanroom, but
> frequently used in other lower level lab?
>
> best
>
> Yu CHEN
>
> On Fri, May 14, 2010 at 4:39 AM, Robert Black  wrote:
>
> > I think it means it can be fabricated using CMOS tools and materials.
> Bulk
> > machining is not CMOS compatible, some surface machining is.
> >
> > But I'm guessing myself,
> >
> > Robert
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