MEMS-talk

News	MEMSnet Home: MEMS-Talk: Re: Silica-on-Si Wafers Re: Silica-on-Si Wafers 2000-11-09 Roger Neef Re: Silica-on-Si Wafers Roger Neef 2000-11-09 --=====================_2052847==_.ALT Content-Type: text/plain; charset="us-ascii" Hello Wilfried, Recently we have encountered many requests for this type of service. We can provide 15 um (150,000Angstroms) of Thermal Oxide on 4" wafers. However, the cost is very expensive due to the science of this type of film. The general rule with Oxide is that every additional 1000 Angstroms takes twice as long as the 1,000 before it. This is due to the fact that the gasses must penetrate the existing Oxide in order to reach and react with the Si layer. The estimated deposition time (actual furnace time) for this process is 52 days. The cost of the furnace is $3,500 per day. The total cost for the deposition would be $182,000. The furnace can hold up to 300 4" and 6" wafers and 250 8" wafers. The quantity would be up to you since you would be paying for furnace time not the wafers. There is a concern with warp. When this much Oxide is put on a 4" wafer that is subjected to such high heat (1100C) for extended periods of time warp is inevitable. We will take certain precautions to minimize the amount of warpage encountered. For reference the estimated cost for 10 um (100,000A) $80,500. If you do not require 15 um the thinner layer is significantly more cost effective. Perhaps several groups in the MEMS community could gather together and run this process together to minimize the cost. If you have any questions my contact information is at the bottom of this page. I will do all I can to help. Regards, Roger Neef Silicon Wafer Division Silicon Valley Microelectronics, Inc. Tel: 408-985-5111 Fax: 408-244-6075 [email protected] http://www.svmi.com 09:04 AM 11/2/2000 +0100, Wilfried Noell wrote: >Hello MEMS community, > >I am looking for silica-on-silicon wafers, or better: >100mm (4") Si wafers with an approx. 15 micron thick SiO2 layer. >The SiO2 maybe either PECVD or thermally grown. > >Any hint is highly appreciated! > >Best regards >Wilfried Noell > Roger Neef Silicon Wafer Division Silicon Valley Microelectronics, Inc. Tel: 408-985-5111 Fax: 408-244-6075 [email protected] http://www.svmi.com --=====================_2052847==_.ALT Content-Type: text/html; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Hello Wilfried, Recently we have encountered many requests for this type of service. We can provide 15 um (150,000Angstroms) of Thermal Oxide on 4" wafers. However, the cost is very expensive due to the science of this type of film. The general rule with Oxide is that every additional 1000 Angstroms takes twice as long as the 1,000 before it. This is due to the fact that the gasses must penetrate the existing Oxide in order to reach and react with the Si layer. The estimated deposition time (actual furnace time) for this process is 52 days. The cost of the furnace is $3,500 per day. The total cost for the deposition would be $182,000. The furnace can hold up to 300 4" and 6" wafers and 250 8" wafers. The quantity would be up to you since you would be paying for furnace time not the wafers. There is a concern with warp. When this much Oxide is put on a 4" wafer that is subjected to such high heat (1100C) for extended periods of time warp is inevitable. We will take certain precautions to minimize the amount of warpage encountered. For reference the estimated cost for 10 um (100,000A) $80,500. If you do not require 15 um the thinner layer is significantly more cost effective. Perhaps several groups in the MEMS community could gather together and run this process together to minimize the cost. If you have any questions my contact information is at the bottom of this page. I will do all I can to help. Regards, Roger Neef Silicon Wafer Division *Silicon Valley Microelectronics, Inc.* Tel: 408-985-5111 Fax: 408-244-6075 [email protected] http://www.svmi.com 09:04 AM 11/2/2000 +0100, Wilfried Noell wrote: >Hello MEMS community, > >I am looking for silica-on-silicon wafers, or better: >100mm (4") Si wafers with an approx. 15 micron thick SiO2 layer. >The SiO2 maybe either PECVD or thermally grown. > >Any hint is highly appreciated! > >Best regards >Wilfried Noell > Roger Neef Silicon Wafer Division *Silicon Valley Microelectronics, Inc.* Tel: 408-985-5111 Fax: 408-244-6075 [email protected] http://www.svmi.com --=====================_2052847==_.ALT-- reply
Events
Glossary
Materials
Links
MEMS-talk