Colleagues:

Below is a compilation of messages received concerning my posted question
about differences between various SiO2 deposition methods.

What about SiO2 layer "cracking" mentioned by Chris Jones -- does anybody
have experience with it?  (Cracking would be really bad in our
application.)  Finally, please note that so far no one has responded to my
question about annealing.

Anyway, my sincere thanks to all those who responded.

T. B. Jones


Original question:

> Dear MEMS colleagues:
>
> For an application in DEP (dielectrophoretic) microfluidics, we use a 1 to
> 2 micron layer of sputtered SiO2 to cover planar electrodes.  A very thin
> layer of photoresist (or other polymer) is then spin-coated to achieve the
> proper contact angle.  Can anyone inform us if there might be difference
> between SPUTTERED and EVAPORATED SiO2?  In particular, would one expect
> either of these two methods to produce a more homogeneous and denser layer?
> We are specifically interested in maximizing the dielectric strength of our
> coatings, and wonder if there might be some advantage of evaporated layers
> with respect to this performance measure.
>
> Also, can one effectively anneal SiO2 after coating to densify the stuff.
> If so, what temperatures and times are needed?

Responses:

>From: Walter Stonas 
>To: "'Thomas B. Jones'" 
>Subject: RE: [mems-talk] SiO2 layers
>Date: Tue, 20 Nov 2001 09:19:10 -0800
>
>Hi Tom,
>
>Yes if the process is optimized for both there will be a difference. If you
>have access to thermally grown CVD it will produce a higher density SiO2
>than the previously mentioned oxides. The limitation of using thermally
>grown oxide is your "thermal budget."
>
>Sincerely,
>Walter Stonas
>Process Development Engineer

>From: Chris Jones 
>To: "'[email protected]'" 
>Subject: SiO2 deposition questions
>Date: Mon, 26 Nov 2001 11:22:23 -0600
>
>Dr. Jones,
>
>    I too am interested in what you find out in regards to the questions you
>posted on the MEMS discussion list.  We are using SiO2 sputtered films as a
>hermetic barrier.   We typically get a deposition rate of 1000 Angstroms per
>hour...  very slow.  The most I have deposited has been half a micron...   I
>assume your sputter distance is much smaller than mine...   What kind of
>deposition rates do you get for your 1 to 2 micron SiO2?

BTW: Our sputtering rate, using an Si target in an O2-rich plasma, is (!we
think!) a bit less than 1 micron/hour.

>  I am also interested in densifying the layer if possible with an anneal...
>I also have been told that cracking can occur in very thick layers of
>SiO2... but so far, I have not experienced this with my films..


>Date: Tue, 20 Nov 2001 21:53:53 -0800 (PST)
>From: Yong Xu 
>To: 
>Subject: about SiO2 layers
>MIME-Version: 1.0
>Status: RO
>
>
>Hello Tom,
>
>I saw your email regarding the SiO2 layers.
>I don't know too much about evaporated SiO2.
>but I believe CVD SiO2 could be another alternative.
>The deposition temperature is less than 450 C and the dielectric
>strength is 10x10^(6) V/cm. please refer to the Table 2
>in p.183 of S. Wolf's Silicon Processing V.1, (first edition) for
>more detail.



________________________________________________________
Thomas B. Jones
Professor of Electrical Engineering
University of Rochester
P.O. Box 270126
Rochester, NY  14627-0126    (USA)
phone: 1-585-275-5233   fax: 1-585-273-4919
email: [email protected]
http://www.ece.rochester.edu/~jones
________________________________________________________