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MEMSnet Home: MEMS-Talk: Control the pore size and layer thickness of porous silicon
Control the pore size and layer thickness of porous silicon
2002-02-14
Frank Fan
Control the pore size and layer thickness of porous silicon
2002-02-15
Giuseppe Barillaro
Control the pore size and layer thickness of porous silicon
2002-02-16
Frank Fan
Control the pore size and layer thickness of porous silicon
2002-02-18
Giuseppe Barillaro
Control the pore size and layer thickness of porous silicon
Giuseppe Barillaro
2002-02-15
Hi Frank,
pore size depends on the doping and type of the used silicon substrate (for
instance, p substrate give nanopore, while n substrate give macropore); the
thickness of grown layer depends on the anodization time and the etching
density current,  with a rate, however, of few microns/min for higher
current.
You can find some good information and reference in the review of Smith and
Collins, Phys. Rev. A, 39, 5409 (1989).
Good luck,
Giuseppe


> Control the PORE SIZE & LAYER THICKNESS of Porous
> Silicon:
>
> Are there any books or papers talking about how to
> control the pore size and layer thickness of forming
> porous silicon?
>
> Best Regards!
>
> Frank
> Feburary 14th,2002
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