This is probably unrelated, but I'm running into some etching problems
with KOH and (100) wafers that sound similar.  We're stumped with
this, so if anyone could supply any information, that would be a big
help.

We're etching a series of uniform V-grooves in a (100) wafer with
6000A of SiO2 thermally grown on the surface.  As far as I know the
wafers are test-grade from Silicon Quest here in the US.

The pattern is a series of 3 micron wide lines spaced on 25 micron
centers.  The mask is aligned as carefully as possible with the <111>
axis, but alignment problems could be a factor.  The mask specs say
it's good down to 0.10 microns, but the manufacturer says their tests
showed it good down to about 0.07 microns.  The mask generates lines
22 microns across and about 19 microns deep.

We're using a 55%/wt KOH solution at a variety of temperatures and
etch times.  The one I've used most recently is 80 deg C for 25
minutes.

When we put the resulting wafer in an SEM, we get very fine grooves
with quite flat walls and nice sharp bottoms, but occasionally we get
line breaks.  The (111) plane walls seem to jump by about half a
micron, go for about a hundred microns or so, then jump back.  It
would appear to be undercutting of the SiO2, but I can't figure out
what would cause it.

If anyone could suggest what parts of our process we might look at to
fix this problem, I'd truly appreciate it.

Thanks,

Tom Benedict                          McDonald Observatory at Mount Locke
[email protected]               Department of Astronomy
Tel: 512-471-3337                     University of Texas at Austin
Fax: 512-471-6016                     Austin, Texas  78712