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MEMSnet Home: MEMS-Talk: (100) Si deep etching
(100) Si deep etching
2002-06-03
Yanjun(David) Tang
2002-06-05
Helen Berney
2002-06-06
shay kaplan
2002-06-04
BERAUER,FRANK (HP-Singapore,ex7)
2002-06-04
Roger Shile
(100) Si deep etching
Roger Shile
2002-06-04
I presume by "mm" you microns.  If you really mean millimeters I don't know
how relevant my advice might be, as such dimensions are beyond my experience.

If the silicon nitride was deposited by thermal LPCVD, it should provide an
adequate mask for etching through 500 microns of Si.  If, however, the nitride
was deposited by Plasma Enhanced CVD it may not.

I suspect your problem is due to the KOH dissolving the SiO2 layer under the
nitride, if so, depositing the silicon nitride mask directly on the Si should
solve the problem,

>>> [email protected] 06/02/02 11:22PM >>>
Hi, MEMS folks:

     This is David Tang, a graduate student in Louisiana Tech University. I'm
doing (100) Silicon deep etching (500mm). The Si wafer is coated with 0.6mm
SiO2 layer and 0.2mm Silicon Nitrate layer is coated on SiO2 layer(Silicon
Quest company). The etchant is KOH, temp 800C, stirring 220RPM and Silicon
Nitrate layer is used for masking. During the etching, I found Silicon
Nitrate
stripped at some edge area, leading to the severe distortion of expected
pattern. Was it because 0.2mm Silicon Nitrate isn't sufficient to mask
against
KOH etchant? Could you help me to improve process to obtain best pattern? Did
someone ever deposit Au/Cr layer on Silicon Nitrate layer to help mask
against
KOH etchant? Thank you for any help.




Best regards

Yanjun(David) Tang

Graduate student
Institute for Micromanufacturing
Louisiana Tech University

1401 Tech Farm Rd. Apt. #238, Ruston, LA 71270, USA
Email: [email protected]
          [email protected]
Homepage: http://www.latech.edu/~yta001/index.htm
Tel: 1-318-255-5133
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