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MEMSnet Home: MEMS-Talk: Underetch of SOI
Underetch of SOI
2003-01-16
Blunier, Stefan
2003-01-16
Bill Moffat
2003-01-17
Phillipe Tabada
2003-01-17
Søren Jensen
2003-01-20
Blunier, Stefan
Underetch of SOI
Blunier, Stefan
2003-01-20
Hi Bill
I suggest that you have red the other comments. I think they are right
when they say thet the intrerface
to the device layer is not good enough, and that the HF attack starts
earlier at this interface.

After cracking the SOI wafer and looking from the side it looks like:

     Silicon Device layer                                   |
|  free hanging stuct    |
_______________________________________|
|__________________|
            ______
                      ______
                                ______
    SiO2                               ______                       SiO2
etched       ______
                                                     ______
_____          _____
______________________________________________________Oxyde remains____

     Silicon support wafer


This is a rough drawing of what happens.

Greetings
Stefan Blunier


-----Original Message-----
From: Bill Moffat [mailto:[email protected]]
Sent: Donnerstag, 16. Januar 2003 22:23
To: General MEMS discussion
Subject: RE: [mems-talk] Underetch of SOI


Blunier is it possible to do a sketch showing the 2 areas that etch at
different rates.  I am having a difficult time working out the geometry
of your device.  Bill Moffat

-----Original Message-----
From: Blunier, Stefan [mailto:[email protected]]
Sent: Thursday, January 16, 2003 4:14 AM
To: [email protected]
Subject: [mems-talk] Underetch of SOI


Dear collegues
I'm working on SOI wafers developing free hanging structures. During
underetch with HF (48%) I noticed that the etch velocity of the two
Si-SiO2 interfaces is different. SiO2 thickness is 3 microns. Production
is bonding of thick device layer and lapping polishing to a thickness of
50 microns. The etch velocity at the interface SiO2-device layer is
faster than the etch velocity at the interface SupportSi-SiO2. To etch
all the oxide under a 50 micron beam I have to overetch to long so my
anchors underetch to much. Does anybody know this problem and how to
avoid it? Thanks
Stefan


_____________________________________________________
Dr. Stefan Blunier
ETH Zuerich, Zentrum CLA G 21.2
Institute of Mechanical Systemes
Tannenstrasse 3
CH - 8092 Zuerich
Switzerland

Phone:   +41 1 632 77 64
Fax:  +41 1 632 11 45
e-mail: [email protected]
__________________________________________________


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